Friday, September 6, 2013

high frequencysine wave inverter



// just follow the code for H- bridge inverter with pic in bult PWM controllers  for genrating sine wave  inverters

#ifndef _XTAL_FREQ
#define _XTAL_FREQ 16000000 
#define __delay_us(x) _delay((unsigned long)((x)*(_XTAL_FREQ/4000000.0)))
#define __delay_ms(x) _delay((unsigned long)((x)*(_XTAL_FREQ/4000.0)))
#endif

#include
__CONFIG(PROTECT&
        HS& //INTIO&             //internal
        OSC_8MHZ&
        WDTDIS&
        MCLRDIS&
        PWRTEN &
        BOREN &
        0x3FFF);

unsigned char sin_table[32] = {0, 25, 49, 73, 96, 118, 137,
    159, 177, 193, 208, 220, 231, 239, 245, 249, 250, 249, 245,
    239, 231, 220, 208, 193, 177, 159, 137, 118, 96, 73, 49, 25};



unsigned char index;
unsigned char soft_start_sh; //soft start shift count.
unsigned char soft_start_td; //soft start time delay.
unsigned int DUTY_CYCLE; //delay.
bit soft_start, wave_flag = 0;

void interrupt siva() {
    if (TMR2IF == 1) {
        TMR2IF = 0;
        CCPR1L = 200; //sin_table[index];

      //  ++index;
        if(index == 32)
        {  index = 0;
           wave_flag = ~wave_flag;
           if( wave_flag)  CCP1CON = 0x8D; //half bridge control
           else  CCP1CON = 0x8C; //half bridge control
        }
    }
}

void main() {

    ANSEL = 0; //Disable ADC
    CM1CON0 = 0; //Disable Comparator
    CM2CON0 = 0; //Disable Comparator
    VRCON = 0;
    PR2 = 249; //16 khz@16MHZ
    TRISC = 0x3F;
    CCP1CON = 0x00;
    ECCPAS = 0x40;
    PWM1CON = 0x94; //5ussec
    PRSEN = 1;
    CCP1CON = 0x8D; //half bridge control
     wave_flag = 0;
    __delay_ms(500);
    TMR2IF = 0;
    T2CON = 0x24; //TMR2 on, prescaler and postscaler 1:5
    while (TMR2IF == 0);
    TMR2IF = 0;
    TRISC = 0x03; //set pwm pins as o/p
    TMR2IE = 1;
    GIE = 1;
    PEIE = 1;
    RC2 = 0; 
    RC3 = 0;
    while (1) {
        if (ECCPASE) index = 0;
   }
}

PWM1A,1B,1C,1D pins form the H bridge circuit. IR2110 and IRF 740 MOS FETS are Used  for circuit. 

Friday, March 22, 2013

Thursday, December 6, 2012

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Friday, October 26, 2012

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