Monday, March 8, 2010

PHASE CORRECT PWM



















#include "mega16.h"
#include "delay.h"
void main(void)
{
unsigned char i;
PORTA=0x00;
DDRA=0x00;
PORTB=0x00;
DDRB=0x08;
PORTC=0x00;
DDRC=0x00;
PORTD=0x00;
DDRD=0x00;

// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: 16000.000 kHz
// Mode: Phase correct PWM top=FFh
// OC0 output: Non-Inverted PWM
TCCR0=0x61;
TCNT0=0x00;
OCR0=0x00;
// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: Timer 1 Stopped
// Mode: Normal top=FFFFh
// OC1A output: Discon.
// OC1B output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off

TCCR1A=0x00;
TCCR1B=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;
// Timer/Counter 2 initialization
// Clock source: System Clock
// Clock value: Timer 2 Stopped
// Mode: Normal top=FFh
// OC2 output: Disconnected
ASSR=0x00;
TCCR2=0x00;
TCNT2=0x00;
OCR2=0x00;
// External Interrupt(s) initialization
// INT0: Off
// INT1: Off
// INT2: Off
MCUCR=0x00;
MCUCSR=0x00;
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=0x00;
// Analog Comparator initialization
// Analog Comparator: Off
// Analog Comparator Input Capture by Timer/Counter 1: Off
ACSR=0x80;
SFIOR=0x00;
while (1)
{
//Fade in ....
for(i=1;i<255;i++)
{OCR0 = i;
 delay_ms(10);
}
//Fade out ....
for(i=255;i>0;i--)
{OCR0 = i;
 delay_ms(10);
 }
};
}

Sunday, March 7, 2010

SOLAR CHARGE CONTROLLER

it was solar charge controller auto cutoff if bat ful and low.













Chip type : ATtiny13
AVR Core Clock frequency: 0.900000 MHz
Memory model : Tiny
External RAM size : 0
Data Stack size : 16
*****************************************************/
#include
#include
#define ADC_VREF_TYPE 0x00
#define FET PORTB.0
#define BTY_LOW PORTB.1
#define BTY_FULL PORTB.2
//***************************************************
unsigned int ADC_RESULT;
bit solar_flag,bty_full_flag,bty_low_flag;
unsigned char count;
//***************************************************
unsigned int read_adc(unsigned char adc_input)
{
ADMUX=adc_input (ADC_VREF_TYPE & 0xff);
delay_us(10);
ADCSRA=0x40;
while ((ADCSRA & 0x10)==0);
ADCSRA=0x10;
return ADCW;
}


void main(void)
{
#pragma optsize-
CLKPR=0x80;
CLKPR=0x00;
#ifdef _OPTIMIZE_SIZE_
#pragma optsize+
#endif
PORTB=0x00;
DDRB=0x07;
TCCR0A=0x00;
TCCR0B=0x00;
TCNT0=0x00;
OCR0A = 0;
OCR0B=0x00;
GIMSK=0x00;
MCUCR=0x00;
// Timer/Counter 0 Interrupt(s) initialization
TIMSK0=0x00;
// Analog Comparator initialization
// Analog Comparator: Off
ACSR=0x80;
ADCSRB=0x00;
DIDR0&=0x03;
DIDR0=0x00;
ADMUX=ADC_VREF_TYPE & 0xff;
ADCSRA=0x87;
while (1)
{delay_ms(100);
//-----------------------------------
ADC_RESULT = read_adc(3);
if(ADC_RESULT > 390)
{solar_flag = 1;
}
else if(ADC_RESULT < solar_flag =" 0;" adc_result =" read_adc(2);"> 515)
{bty_full_flag = 1;
}
else if(ADC_RESULT < bty_low_flag =" 1;" bty_full_flag =" 0;" tccr0a="0x00;" tccr0b="0x00;" ocr0a =" 0;" fet =" 0;" bty_full =" 1;" bty_full =" 0;">10)
{count = 0;
BTY_LOW = !BTY_LOW;
}
}
}
else
{if(bty_full_flag)
{BTY_FULL = 1;
}
else
{BTY_FULL = 0;
}
if( bty_low_flag)
{FET = 0;
TCCR0A=0x00;
TCCR0B=0x00;
OCR0A = 0;
BTY_LOW = 1;
}
else
{TCCR0A=0x83;
TCCR0B=0x03;
OCR0A = 50; //FET = 1;
BTY_LOW = 0;
}
}
};
}

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